The present invention relates to differential signal generator circuits, and in particular, to differential signal generator circuits having controlled signal rise and fall times.
As the density of a typical integrated circuit (IC), or chip, continues to increase, increasing numbers of complex circuit functions are being integrated into each single chip. As the prices for such chips have declined, sometimes dramatically, this has become increasingly problematic from the standpoint of production costs, since such increasingly complex chips become more difficult and often, therefore, more costly to adequately test for defects. As a result, it has become increasingly common for chips to include some form of built-in system test (BIST) circuitry for performing internal testing of various portions of the integrated circuit to provide some form of output status signals indicative of any defects or performance problems. This advantageously allows for the use of simpler and typically less costly external automatic test equipment (ATE), as well as reduced testing times.